Hacker Newsnew | past | comments | ask | show | jobs | submitlogin

>But there's more to it as the L2 cache is often shared amongst cores in a multi-cpu system (where as the L1 is per-core)

As comatose_kid notes, this is highly dependent on CPU architecture. Intel's architectures from Nehalem to the current Ivy Bridge have smaller per-core L2 caches, and a shared L3 cache across all cores.



Guidelines | FAQ | Lists | API | Security | Legal | Apply to YC | Contact

Search: